Renesas Electronics /R7FA2A1AB /SDADC24 /ADCR

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Interpret as ADCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Reserved0SDADCRD0 (0)SDADCRS 0 (000)SDADCRC 0Reserved

SDADCRC=000, SDADCRS=0

Description

Sigma-delta A/D Converter Conversion Result Register

Fields

SDADCRD

The 24-bit A/D conversion result

Reserved

These bits are read as 0000000000000000. The write value should be 0000000000000000.

SDADCRS

Status of an A/D conversion result

0 (0): Normal status (within the range)

1 (1): Overflow occurred

SDADCRC

Channel number for an A/D conversion result

0 (000): Reset value (Conversion result is invalid)

1 (001): Input multiplexer 0 (ANSD0P / ANSD0N)

2 (010): Input multiplexer 1 (ANSD1P / ANSD1N)

3 (011): Input multiplexer 2 (ANSD2P / ANSD2N)

4 (100): Input multiplexer 3 (ANSD3P / ANSD3N)

5 (101): Input multiplexer 4 (AMP0O / AMP1O)

Reserved

These bits are read as 0000. The write value should be 0000.

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